❝
Tosiron Adegbija is an assistant professor of electrical and computer engineering whose research falls in the broad area of computer architecture, with an emphasis on adaptable computing, low-power embedded systems design and optimization methodologies, and microprocessor optimizations for the Internet of Things, or IoT. During the summer of 2014 he was a research associate with Hewlett-Packard, or HP, Labs, during which he researched right-provisioned computer architectures for the IoT.
He received his doctorate and master's degrees in electrical and computer engineering from the University of Florida in 2015 and 2011, respectively, and a bachelor's degree in electrical engineering from the University of Ilorin, Nigeria in 2005. He is a member of the Institute of Electrical and Electronics Engineers and the Association for Computing Machinery.Show Less
VOSviewer
Courses
- ESDOEmbedded System Design and Optimization
- DLDigital Logic
- CALDComputer-Aided Logic Design
- CADComputer Architecture and Design
Grants
- Inter-Architecture Portability of Deep Neural Network and Side Channel Attack
Principal Investigator (PI)
2021
$47.7K
Active - CAREER: Advancing STTRAM Caches for Runtime Adaptable and Energy-Efficient Microarchitectures
Principal Investigator (PI)
2019
$532.0K
Active - CSR:Medium:Unified Modeling and Synthesis for Application-specific Systems-on-a-chip
Principal Investigator (PI)
2016
$300.0K
News
- Making Computers, Mobile Devices More Energy-Efficient
2019
Publications (46)
Recent
- DIALECT: A Methodology for Generating Domain-Specific Accelerators for Edge Computing
2021
- Energy characterization of graph workloads
2021
- Exploring Domain-Specific Architectures for Energy-Efficient Wearable Computing
2020
- Biomimetic Middleware Design Principles for IoT Infrastructures
2020
- A Study of Runtime Adaptive Prefetching for STTRAM L1 Caches
2020
- ECG-Based Authentication Using Timing-Aware Domain-Specific Architecture
2020
- SCART: Predicting STT-RAM Cache Retention Times Using Machine Learning
2019
- Energy-Efficient Runtime Adaptable L1 STT-RAM Cache Design
2019
- Right-Provisioned IoT Edge Computing: An Overview
2019
- Energy and Performance Analysis of STTRAM Caches for Mobile Applications
2019
- Evaluating Design Space Subsetting for Multi-Objective Optimization in Configurable Systems
2019
- MirrorCache: An Energy-Efficient Relaxed Retention L1 STTRAM Cache
2019
- Advancing STTRAM Caches for Runtime Adaptable Energy- Efficient Microarchitectures
2019
- Bit-wise and Multi-GPU Implementations of DNA Recombination Algorithm
2019
- CONDENSE: A Moving Target Defense Approach for Mitigating Cache Side Channel Attacks
2019
- A Survey of Phase Classification Techniques for Characterizing Variable Application Behavior
2019
- ARC: DVFS-Aware Asymmetric-Retention STT-RAM Caches for Energy-Efficient Multicore Processors
2019
- HALLS: A Highly Adaptable Last Level STT-RAM Cache Architecture
2019
- Performance Characterization of IoT Processors: A Tale of an ARM and an Atom
2018
- A Workload Characterization of the SPEC CPU2017 Benchmark Suite
2018
- HERMIT: A Benchmark Suite for the Internet of Medical Things
2018
- COCAINE: Low-Overhead Cache Side Channel Security Using Reconfigurable Caches
2018
- LARS: Logically Adaptable Retention Time STT-RAM Cache for Embedded Systems
2018
- AMELIA: An Application of the Internet of Things for Aviation Safety
2018
- Modular Electronics for Broadening Non-Expert Participation in STEM Innovation: An IoT Perspective
2018
- A Workload Characterization for the Internet of Medical Things (IoMT)
2017
- Application-Specific Autonomic Cache Tuning for General Purpose GPUs
2017
- AMELIA: a prototype example for edge computing on the Internet of Things
2017
- PhLock: A Cache Energy Saving Technique Using Phasebased Cache Locking
2017
- Coding for efficient caching in multicore embedded systems
2017
- PACT: Priority-Aware Phase-based Cache Tuning for Embedded Systems
2017
- TaPT: Temperature-Aware Dynamic Cache Optimization for Embedded Systems
2017
- Exploiting configurability as a defense against cache side channel attacks
2017
- Phase-based Dynamic Instruction Window Optimization for Embedded Systems
2016
- Microprocessor Optimizations for the Internet of Things: A Survey
2016
- Exploring Non-Volatile Memory-based Caches for Energy-Efficient Embedded Systems
2016
- Enabling Right- Provisioned Microprocessor Architectures for the Internet of Things
2015
- Phase-based Cache Locking for Embedded Systems
2015
- Analysis of cache tuner architectural layouts for multicore embedded systems
2014
- Thermal-aware phase-based tuning of embedded systems
2014
- Dynamic Phase-based Optimization of Embedded Systems
2014
- Phase distance mapping: a phase-based cache tuning methodology for embedded systems
2014
- Energy-efficient phase-based cache tuning for multimedia applications in embedded systems
2014
- Exploring the tradeoffs of configurability and heterogeneity in multicore embedded systems
2013
- Exploiting dynamic phase distance mapping for phase-based tuning of embedded systems
2013
- Dynamic phase-based tuning for embedded systems using phase distance mapping
2012